Power consumption is becoming increasingly important for both embedded and high-performance systems. Off-chip data buses can be a major power consumer. In this paper, we present a strategy called “power protocol ” that tries to reduce the dynamic power d

PowerProtocol:ReducingPowerDissipationonOff-ChipDataBuses

K.Basu,A.Choudhary,J.Pisharath

ECEDepartmentNorthwesternUniversityEvanston,IL60208,USA

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kohinoor,choudhar,jay@ece.nwu.edu

M.KandemirCSEDepartment

ThePennsylvaniaStateUniversityUniversityPark,PA16802,USAkandemir@cse.psu.edu1.Introduction

Architectural-levelpoweroptimizationcantargetdiffer-entsystemcomponentssuchasCPU,caches,mainmemory,andbuses[5,6,22,4].Powerspentinoff-chipbusescanbeasigni cantportionoftheoverallpowerbudget.Asanex-ample,thecorepowerconsumptionofIntelCeleronat266MHzis16W,whileitsoff-chipbus(forastandardcon gu-ration)operatingat133MHzconsumes3.3W[12,13].Thecontributionofoff-chipbuspowerconsumptiontotheover-allpowerbudgetincreasesevenmoreforembeddedsystemswithlow-powerprocessorcoresandmemories,makingoff-chipbusesapotentialcandidateforpoweroptimization.Figure1showsthepowerconsumptionduetooff-chipdatabusforseveralembeddedbenchmarkcodesasapercentageoftheoverallpowerconsumption(whichincludesproces-sordatapath,caches,buses,TLB,register le,instructionissuelogic,clock,andoff-chipmemory)foranembeddedprocessor.Fromthis gure,weseethattheoff-chipdatabusconsumesbetween9.8%and23.2%ofthetotalpowerconsumedbythesystemdependingonthebenchmarkbe-ingrun.So,reducingthepowerconsumptionoftheoff-chipdatabuswouldreducetheoverallpowerconsumptionofthesystemtoaconsiderableextent.

Powerdissipationonoff-chipdatabusescanbereducedbyatleasttwotechniques:byreducingthenumberofbuslinesactivatedduringdatatransferandbyreducingthenumberofbittransitionsontheactivebuslines.Con-sequently,maximumbene tscanbeobtainedbyapply-ingboththetechniques.Inthispaper,wepresentadatabustransmitprotocol,calledpowerprotocol,toreducethepowerconsumptiononoff-chipdatabuses.Inthisap-proach,weemployasmallcache(calledvaluecache,orVCforshort)ateachsideoftheoff-chipdatabus.Thesevaluecacheskeeptrackofthedatavaluesthathaverecentlybeentransmittedoverthebus.Theentriesinthesecachesareconstructedinsuchawaythatthecontentsofboththevaluecachesarethesameallthetime.Whenadatavalueneedstobetransmittedoverthebus,we rstcheckwhetheritisinthevaluecacheofthesender(whetheritismemoryorcache).Ifitis,wetransmitonlytheindexofthedata(i.e.,itsvaluecacheaddress,orindex)insteadoftheactualdatavalueand,theotherside(receiver)candeterminethedatavaluebyusingthisindexanditsvaluecache.Since

Abstract

Powerconsumptionisbecomingincreasinglyimportantforbothembeddedandhigh-performancesystems.Off-chipdatabusescanbeamajorpowerconsumer.Inthispaper,wepresentastrategycalled“powerprotocol”thattriestoreducethedynamicpowerdissipationonoff-chipdatabuses.Toaccomplishthis,ourstrategyreducesthenumberofbuslinesthatneedtobeactivatedfordatatransferbyem-ployingasmallcache(called“valuecache”)ateachsideoftheoff-chipdatabus.Thesevaluecacheskeeptrackofthedatavaluesthathaverecentlybeentransmittedoverthebus.Theentriesinthesecachesareconstructedinsuchawaythatthecontentsofboththevaluecachesarethesameallthetime.Whenadatavalueneedstobetransmittedoverthebus,we rstcheckwhetheritisinthevaluecacheofthesender.Ifitis,wetransmitonlytheindexofthedata(i.e.,itsvaluecacheaddress)insteadoftheactualdatavalueand,theotherside(receiver)candeterminethedatavaluebyus-ingthisindexanditsvaluecache.Ourexperimentalresultsusingasetof fteenbenchmarkcodesfromembeddedsys-temsdomainshowthatpowerprotocolisveryeffectiveinpractice,andreducesthebitswitchingactivityonthedatabusbyasmuchas70.7%(withavaluecacheof128en-tries).Wealsopresentresultsfromanimplementationthatcombinesourstrategywith1-to-2encoding,apopularbusencodingstrategyforlowpower.Ourresultsindicatethatthiscombinedoptimizationstrategyreducesbitswitchingactivityby67.8%ontheaverage(acrossallbenchmarks).Thesereductionsinbitswitchingactivityleadtomorethan7%reductiononoverallsystemenergyontheaverageforavaluecacheof256entries.Wealsostudythesensitivityofoursavingstothevaluecachecapacityanddatacachecapacity.

ThisworkwassupportedinpartbyNSFAward#0093082andbyDARPA’sPower-AwareComputingandCommunicationsProgramundercontractNo.FF33615-00-C-1631.